SiC vs silicon: the thermal reality check

The SiC versus silicon question is usually argued in terms of RDS(on) or blocking voltage, which is roughly like comparing cars by peak horsepower. The argument that actually closes a design is thermal: what the junction does under real switching conditions, what the heat has to travel through, and what the whole cooling chain costs. I have now taken apart enough 1200 V converter designs — mine and other people's — to say that the datasheet comparison and the thermal reality check rarely agree, and the thermal check is the one that predicts your product.

The loss balance first. An IGBT pays a fixed toll at every switching event: tail-current losses at turn-off and the forward recovery of the co-packed diode at turn-on, largely independent of load current. Its conduction loss, meanwhile, is a roughly constant voltage drop plus a modest resistive term. SiC MOSFETs invert that trade: conduction loss is purely resistive — small at light load, dominant at full load — while switching energy can be a fifth to a tenth of the IGBT's, and it stays low at high junction temperatures where IGBT switching performance degrades. So the crossover is not a mystery: at low frequency and high duty cycle, the IGBT's flat conduction toll wins; as switching frequency climbs, the IGBT's per-event tax compounds and SiC wins by an increasingly absurd margin. Between those regimes there is a genuine engineering judgment to make, and junction temperature decides it.

Zth(t): the curve that matters more than Rth

Steady-state thermal resistance Rth(j-c) is the number everyone quotes and the number I trust least for power converters. Converters are pulsed machines. What governs the junction during a 100 µs overload, a soft-start, or simply every switching cycle at 100 kHz is the transient thermal impedance Zth(t) — the RC network of die, attach, substrate, baseplate and heatsink responding in time. A thin SiC die on a thick silicon-carbide substrate behaves very differently from a silicon die: the smaller, thinner die reaches its steady-state junction temperature faster because there is less thermal mass directly behind the junction, and the heat flux density through the attach layer is higher. The classic mistake is to size a SiC design by extrapolating silicon Zth curves scaled by Rth — the near-transient region of a thin die spikes harder and earlier than that scaling predicts, and the spike is exactly where your short-circuit rating or overload dwell lives.

The chain behind the die deserves its own audit. Die → die attach (sintered silver or solder, and voids in it are hot spots, not statistics) → ceramic substrate (the dominant lateral-spreading and vertical resistance term) → baseplate or direct-bond, then thermal interface material, then heatsink. SiC's higher allowed junction temperature — 175 °C or even 200 °C on newer parts — is often treated as permission to run hot. It is better treated as an insurance policy for transients: running continuously near the limit ages the gate oxide of the MOSFET measurably faster and pushes the TIM and encapsulant aging mechanisms to the front of your failure budget. I design for a continuous junction around 125–150 °C and treat the headroom above that as transient capacity, read directly off Zth(t) for the mission profile.

Where silicon still wins

I say this as someone whose career is WBG devices: silicon IGBTs are not dead and pretending otherwise is engineering malpractice. Silicon wins when switching frequency is intrinsically low — grid-frequency multilevel converters, low-frequency choppers — because the SiC premium buys almost no loss reduction there, while IGBT robustness (avalanche energy, short-circuit withstand measured in tens of microseconds rather than two or three, and a forgiving gate) is worth real money in field failure rates. Silicon wins on cost per ampere at volume, and it wins on the supply chain. What SiC buys you is frequency: magnetics and capacitors shrink, power density rises, and the converter's control bandwidth improves. Whether that trade closes depends on the cooling system.

That is the system-level math too many comparisons skip: a device that costs five times more but halves the heat load can win outright once you price the cooling. Liquid cooling, extruded heatsinks, fans, and their assembly and warranty costs are all per-kilowatt-of-heat line items. A worked example from my own lab: the same 22 kW EV-charger power stage, once as a 30 kHz silicon IGBT design, once as a 100 kHz SiC design, in the same enclosure. The IGBT version dissipates roughly 1.1 kW at full load and needs a substantial forced-air heatsink to hold junctions under 125 °C; the SiC version dissipates under 500 W, loses the fan entirely (a sealed, conduction-cooled housing), and its magnetics shrink to a fraction of the volume. The SiC devices cost about 300 € more per unit at the time; the heatsink, fan, assembly, and enclosure volume we deleted cost more than that back, and the elimination of the fan removed the single most common field failure in the product's reliability history. On a spreadsheet of device prices, silicon won. On a spreadsheet of the product, SiC won by a margin I did not have to argue about.

The honest conclusion is not "SiC everywhere" but "SiC where the physics pays": high voltage, high frequency, thermally ambitious products. Run the loss budget first, then the Zth(t) against your real mission profile, then the cooling cost as a per-watt line item — and the right answer usually presents itself without much further debate.